[
  {
    "attention_priority": "P1",
    "question": "Which traces separate accelerator execution, host fallback, runtime overhead, and repeated benchmark evidence?",
    "target_id": "benchmark_boundary:claim_001"
  },
  {
    "attention_priority": "P1",
    "question": "Which traces separate accelerator execution, host fallback, runtime overhead, and repeated benchmark evidence?",
    "target_id": "benchmark_boundary:claim_002"
  },
  {
    "attention_priority": "P1",
    "question": "Which data_memory_bytes value is authoritative for compiler, simulator, RTL, and runtime evidence?",
    "target_id": "memory_mismatch:data_memory_bytes"
  },
  {
    "attention_priority": "P1",
    "question": "Would this kernel fit in the RTL memory map without simulator-only capacity?",
    "target_id": "memory_trace_exceeds_rtl:int8_vector_dot_then_store"
  },
  {
    "attention_priority": "P1",
    "question": "Can RTL decode and execute this instruction with the same semantics assumed by the compiler?",
    "target_id": "rtl_absent:op_002:VDOT8"
  },
  {
    "attention_priority": "P1",
    "question": "What RTL trace or source reference closes this compiler-hardware assumption?",
    "target_id": "rtl_known_gap:VDOT8"
  },
  {
    "attention_priority": "P1",
    "question": "What paired simulator and RTL traces support or refute this behavior?",
    "target_id": "sim_rtl_equivalence_boundary:claim_003"
  },
  {
    "attention_priority": "P1",
    "question": "Does the benchmark separate accelerator execution from host fallback work?",
    "target_id": "unsupported_fallback:op_003"
  },
  {
    "attention_priority": "P2",
    "question": "Can the generated RTL be traced back to the generator version, source inputs, and manifest used for this packet?",
    "target_id": "generated_artifact_provenance:rtl"
  },
  {
    "attention_priority": "P2",
    "question": "Is the store/retire/HALT ordering evidenced in both simulator and RTL behavior?",
    "target_id": "lowering_order:op_004"
  },
  {
    "attention_priority": "P2",
    "question": "Which alignment_bytes value is authoritative for compiler, simulator, RTL, and runtime evidence?",
    "target_id": "memory_mismatch:alignment_bytes"
  },
  {
    "attention_priority": "P2",
    "question": "Which load_latency_cycles value is authoritative for compiler, simulator, RTL, and runtime evidence?",
    "target_id": "memory_mismatch:load_latency_cycles"
  },
  {
    "attention_priority": "P2",
    "question": "Which store_latency_cycles value is authoritative for compiler, simulator, RTL, and runtime evidence?",
    "target_id": "memory_mismatch:store_latency_cycles"
  },
  {
    "attention_priority": "P2",
    "question": "What RTL trace or source reference closes this compiler-hardware assumption?",
    "target_id": "rtl_known_gap:HALT"
  },
  {
    "attention_priority": "P2",
    "question": "Is host fallback output merged, attributed, and excluded from accelerator-only performance claims?",
    "target_id": "runtime_driver:host_fallback_merge"
  },
  {
    "attention_priority": "P2",
    "question": "Which behavior is actually covered by unit, simulator, RTL, and public reproduction evidence?",
    "target_id": "test_coverage:boundary"
  }
]